During meeting session, the
mobility of holes calculated last week is approved to be generally acceptable.
The
objective of this week is to simulate the VTC of PMOS inverter. Since the
structure of organic pseudo PMOS is similar to pseudo NMOS, we discussed the
arrangement of pseudo NMOS first.
Materials about pseduo NMOS we collected are as follows.
Pseudo NMOS has three types: (a) The pseudo-NMOS logic inverter; (b) The enhancement-load NMOS inverter; (c) The depletion-load NMOS inverter. During this project, condition is similar to second circumstance whose circuit is shown below.
Materials about pseduo NMOS we collected are as follows.
Pseudo NMOS has three types: (a) The pseudo-NMOS logic inverter; (b) The enhancement-load NMOS inverter; (c) The depletion-load NMOS inverter. During this project, condition is similar to second circumstance whose circuit is shown below.
In this
mode, the load transistor is always in saturated region. The VTC graph of pseudo NMOS is as follows:
As for the project, the difference is that transistors are replaced with two PMOS to form a
PMOS inverter. But the result VTC of simulation should be similar.
